1. Technical Field
The present invention generally relates to a nonvolatile memory device, and to a variable resistance memory device.
2. Related Art
In general, a semiconductor memory device is classified into a volatile memory device and a nonvolatile memory device. The volatile memory device loses data stored therein when power is cut off, whereas the nonvolatile memory device retains data stored therein even though power is cut off.
The nonvolatile memory device includes various types of memory cells. Depending on the structures of the memory cells, the nonvolatile memory device may be classified into a flash memory device, ferroelectric RAM (FRAM) using a ferroelectric capacitor, magnetic RAM (MRAM) using a tunneling magneto-resistive (TMR) layer, and a phase change memory device using chalcogenide alloys. Particularly, the phase change memory device is a nonvolatile memory device using a phase change, that is, a resistance change, according to a temperature change. For this reason, the phase change memory device is also called a variable resistance memory device.
The memory cell of the phase change memory device is made of a calcogen compound, that is, phase change materials, for example, a germanium (Ge)-antimony (Sb)-tellurium (Te) mixture (GST) (hereinafter referred to as “GST materials”). The GST materials have an amorphous state indicative of relatively high resistivity and a crystalline state having relatively low resistivity. The memory cell of the phase change memory device may store data “1” corresponding to the amorphous state and data “0” corresponding to the crystalline state. When the GST materials are heated, data corresponding to the amorphous state or the crystalline state is programmed into the memory cell of the phase change memory device. For example, the amorphous state or crystalline state of the GST materials may be controlled by controlling the amount of current for heating the GST materials and the time that it takes to supply the current.
The program operation of the variable resistance memory device includes a program operation and a verify read operation for verifying the state of a memory cell. The time that it takes to supply a program current to the memory cell accounts for a large part of the time necessary for the program operation of the variable resistance memory device. That is, if the time that it takes to supply a program current to the memory cell is reduced, the program performance of the variable resistance memory device will be an improved program.
The time that it takes to supply a program current to the memory cell includes the time that it takes to prepare for the program current to be supplied to the memory cell and the time that it takes the state of the memory cell to be changed by the program current. Accordingly, if the time that it takes to prepare for or stabilize the program current to be supplied to the memory cell is reduced, the program performance of the variable resistance memory device may be improved.